发明名称 |
JOINT TIMING RECOVERY AND EQUALIZATION FOR AN N-ANTENNAE SYSTEM |
摘要 |
<p>A timing recovery loop in the front end of a digital receiver includes a sample rate converter which receives a symbol stream at a first sampling rate and outputs the symbol stream at a second sampling rate responsive to a timing recovery (TR) control signal, a forward equalizer generating an equalized feedback signal based on the symbol stream at the second sampling rate, and a timing recovery circuit generating the TR control signal based upon the equalized feedback signal. If desired, the timing recovery loop may include a carrier recovery circuit electrically coupling the sample rate converter to the forward equalizer and a finite impulse response (FIR) filter electrically coupling the carrier recovery circuit to the forward equalizer. In an exemplary case, the FIR filter is a square-root raised cosine filter. A method for controlling the timing recovery loop based on the equalized feedback signal and a corresponding timing recovery control signal are also described.</p> |
申请公布号 |
EP1397880(B1) |
申请公布日期 |
2006.10.11 |
申请号 |
EP20020733106 |
申请日期 |
2002.06.04 |
申请人 |
KONINKLIJKE PHILIPS ELECTRONICS N.V. |
发明人 |
MEEHAN, JOSEPH;OUYANG, XUEMEI |
分类号 |
H04B7/005;H04L1/06;H04B7/08;H04B7/10;H04L25/03;H04N5/44;H04N21/438 |
主分类号 |
H04B7/005 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|