发明名称 WAFER LEVEL SUPER STRETCH SOLDER
摘要 <p>We disclose a technique to generate stretched solder columns (bumps) at the wafer level, suitable for wafer level packaging. This is accomplished through use of using two wafers-the standard (functional) wafer that contains the integrated circuits and a master (dummy) wafer on whose surface is provided an array of solder bumps that is the mirror image of that on the functional wafer. After suitable alignment, both sets of solder bumps are melted and then slowly brought together till they merge. Then, as they cool, they are slowly pulled apart thereby stretching the merged solder columns. Once the latter have fully solidified, they are separated from the master wafer only.</p>
申请公布号 EP1709675(A1) 申请公布日期 2006.10.11
申请号 EP20040809243 申请日期 2004.12.21
申请人 AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH;THE NATIONAL UNIVERSITY OF SINGAPORE;GEORGIA TECH RESEARCH CORPORATION 发明人 WONG, EE, HUA;RAJOO, RANJAN;TEO, POI, SIONG
分类号 H01L21/60;B23K1/00;H01L21/44;H05K3/34 主分类号 H01L21/60
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