发明名称 |
Mechanism to enhance observability of integrated circuit failures during burn-in tests |
摘要 |
A system and method enhance observability of IC failures during burn-in tests. Scan automatic test pattern generation and memory built-in self-test patterns are monitored during the burn-in tests to provide a mechanism for observing selective scan chain outputs and memory BIST status outputs.
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申请公布号 |
US7120842(B2) |
申请公布日期 |
2006.10.10 |
申请号 |
US20030667879 |
申请日期 |
2003.09.22 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
BAREVADIA GORDHAN;AGASHE ANUPAMA ANIRUDDHA;KRISHNAMOORTHY NIKILA;PAREKHJI RUBIN AJIT;SIMPSON NEIL J. |
分类号 |
G01R31/28;G01R31/3185;G01R31/319;G11C29/44 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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