发明名称 Signal samplers and buffers with enhanced linearity
摘要 The invention recognizes that sampler linearity is degraded because transfer voltage across a sampler's buffer varies with amplitude of the analog signal being sampled. Because this transfer voltage is in the signal path it modulates the signal and distorts the resulting sample. In the invention, sampler embodiments are provided which include replica current generators that provide and route sample currents to sample capacitors so that an associated buffer transistor can transfer a faithful copy of the analog signal's potential to the sample capacitor and thereby significantly enhance the sampler's linearity. The replica current generators generally include a replica load that mimics the sample load driven by the buffer transistor.
申请公布号 US7119584(B1) 申请公布日期 2006.10.10
申请号 US20040897483 申请日期 2004.07.23
申请人 ANALOG DEVICES, INC. 发明人 ALI AHMED MOHAMED ABDELATTY
分类号 G11C27/02;H03K5/00 主分类号 G11C27/02
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