| 发明名称 |
Multi-port memory based on DRAM core |
| 摘要 |
A semiconductor memory device includes a plurality of N external ports, each of which receives commands, and an internal circuit which performs at least N access operations during a minimum interval of the commands that are input into one of the external ports.
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| 申请公布号 |
US7120761(B2) |
申请公布日期 |
2006.10.10 |
| 申请号 |
US20020284092 |
申请日期 |
2002.10.31 |
| 申请人 |
FUJITSU LIMITED |
发明人 |
MATSUZAKI YASUROU;SUZUKI TAKAAKI;YAMAZAKI MASAFUMI;KAWASAKI KENICHI;KAMATA SHINNOSUKE;SATO AYAKO;MATSUMIYA MASATO |
| 分类号 |
G06F12/00;G11C7/22;G11C8/16;G11C8/18;G11C11/409 |
主分类号 |
G06F12/00 |
| 代理机构 |
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