发明名称 Voltage tolerant input circuit
摘要 A tolerant input circuit (200;300;400;500) that functions stably regardless of fabrication differences without having to adjust the threshold value of an input circuit (2). The tolerant input circuit includes a step-down device configured by an N-channel MOS transistor (Tr3) connected between an input pad (1) and the input circuit. Voltage from a power supply (VDD) is supplied to the gate of the N-channel MOS transistor in the step-down device to decrease the voltage of a high voltage signal provided to the input pad to the voltage of the power supply or lower. The signal with decreased voltage is provided to the input circuit. The tolerant input circuit includes a back gate voltage control circuit (Tr4) for increasing back gate voltage of the N-channel MOS transistor in the step-down device when the input pad is provided with a high voltage signal.
申请公布号 EP1708365(A1) 申请公布日期 2006.10.04
申请号 EP20050255633 申请日期 2005.09.14
申请人 FUJITSU LIMITED 发明人 SUZUKI, TOYOKI;TOMIDA, MITSUAKI;IWAMOTO, MASAHIRO;UNO, OSAMU
分类号 H03K19/003;H03K19/0185 主分类号 H03K19/003
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