Identification of a reference integrated circuit for a pick and place device

摘要

The method involves optically searching reference patterns, realized in a reference chip (RC) during the fabrication of active and/or passive integrated circuits, on a wafer carrying the integrated circuits. The reference patterns are distinct from optically recognizable patterns of the other chips. The chip (RC) has geometrical patterns (10-13) optically recognizable in the passivation level or in the last metallization level of the wafer. Independent claims are also included for the following: (1) a system for assembling integrated circuits using a visually recognizable pick and place device and executing an integrated circuit chip pick and place device and wafer origin position aligning method; and (2) an integrated circuit wafer.