发明名称 |
Non-volatile semiconductor storage device performing ROM read operation upon power-on |
摘要 |
A power-on reset circuit has a power-on level detecting circuit which detects a power voltage to output a power-on reset signal and a delay circuit which delays the power-on reset signal output by the power-on level detecting circuit. Two chip address specifying pads are connected to the delay circuit. Delay time in the delay time is controlled according to a chip address supplied to these two pads.
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申请公布号 |
US7116603(B2) |
申请公布日期 |
2006.10.03 |
申请号 |
US20030648853 |
申请日期 |
2003.08.26 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
KANDA KAZUSHIGE;NAKAMURA HIROSHI |
分类号 |
G11C7/00;G11C16/02;G11C5/00;G11C16/06;G11C16/20;G11C16/30;H01L27/115 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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