发明名称 Mitigating access penalty of a semiconductor nonvolatile memory
摘要 Adding a nonvolatile storage (e.g., a cache) to an associated memory array within a semiconductor nonvolatile memory may mitigate the access penalty that occurs in semiconductor nonvolatile memories, such as flash memories and flash devices. For example, in response to a memory access request, the cache may be accessed for data before accessing the memory array and the data may be selectively stored from the memory array into the cache. In another embodiment, an asynchronous access to a semiconductor nonvolatile memory may be converted into a synchronous access.
申请公布号 US7117306(B2) 申请公布日期 2006.10.03
申请号 US20020324445 申请日期 2002.12.19
申请人 INTEL CORPORATION 发明人 RUDELIC JOHN C.
分类号 G06F12/00;G06F12/08 主分类号 G06F12/00
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