| 摘要 |
Specified thin-film transistors 26 and 27 are caused to conduct by a gradation signal inputted in control circuits 24 and 25 , and resistors with a conduction resistance of activated transistors are inserted between any of reference voltages V 0 , V 2 , and V 4 and an output terminal T 1 or between any of reference voltages V 1 and V 3 and an output terminal T 2 , and a pair of thin-film transistors 29 in a sampling circuit 23 are caused to conduct simultaneously in sync with the gradation signal. If a signal line SL 1 is selected, reference voltages V 0 , V 2 , or V 4 and V 1 or V 3 are applied to the signal line SL 1 , either as they are or as divided by the conduction resistance of the activated thin-film transistors, by using a junction point between the sampling circuit 23 and signal line SL 1 as a voltage dividing point.
|
