发明名称 DIGITAL TO ANALOG CONVERTER EMPLOYING SIGMA-DELTA LOOP AND FEEDBACK DAC MODEL
摘要 A CIRCUIT TOPOLOGY AND METHOD FOR CONVERTING A DIGITAL INPUT SIGNAL TO AN ANALOG OUTPUT SIGNAL EMPLOYS A MODIFIED SIGMA-DELTA LOOP AND A DAC, AND OPERATES WITH IMPROVED ACCURACY OVER A WIDE FREQUENCY RANGE. A LOOP FILTER SUCH AS A DIGITAL ACCUMULATOR RECEIVES AN INPUT SIGNAL PROPORTIONAL TO THE DIFFERENCE BETWEEN A DIGITAL INPUT SIGNAL AND A FEEDBACK SIGNAL. A QUANTIZER QUANTIZES THE OUTPUT OF THE LOOP FILTER, AND THE DAC CONVERTS THE QUANTIZED SIGNAL INTO AN ANALOG OUTPUT SIGNAL. THE QUANTIZED SIGNAL IS ALSO PROVIDED TO A DAC MODEL. IN RESPONSE TO THE QUANTIZED SIGNAL AND BEHAVIORAL INFORMATION ABOUT THE DAC, THE DAC MODEL VARIES THE FEEDBACK SIGNAL TO MATCH EXPECTED OUTPUT SIGNALS FROM THE DAC, INCLUDING ERRORS INTRODUCED BY THE DAC. BY THE OPERATION OF THE SIGMA-DELTA LOOP, THE ERRORS OF THE DAC ARE SUBSTANTIALLY REDUCED.
申请公布号 MY125959(A) 申请公布日期 2006.09.29
申请号 MYPI20014607 申请日期 2001.10.02
申请人 TERADYNE, INC. 发明人 TIMOTHY W. SHEEN
分类号 H03M1/12;H03M3/00 主分类号 H03M1/12
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