发明名称 MARGINLESS DETERMINATION CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To operate electronic equipment which monitors presence of margin regardless of circumferential conditions without changing the frequency of a clock signal up to marginal conditions. <P>SOLUTION: This marginal determination circuit comprises: a means 1 for storing data to be determined, a means 2 for delaying the data; a means 3 for storing the output of the means 2; and a means 4 for comparing the stored contents of the means 1 and the stored contents of the means 3 and outputting a marginless detection signal when both differ. The marginless detection signal output by the means 4 is used as a switching control signal for a clock switch circuit. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2006260190(A) 申请公布日期 2006.09.28
申请号 JP20050076961 申请日期 2005.03.17
申请人 FUJITSU LTD 发明人 YOSHIDA KENJI;KOIKE YOSHIHIKO;YOSHIDA TETSUYA
分类号 G06F1/04;G06F1/10;H03K19/21 主分类号 G06F1/04
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