发明名称 PROCESSOR AND METHOD FOR CONTROLLING INTERRUPT PROCESS APPLIED TO PROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide a small processor that is operable at sufficiently high operating speed and that provides high substantial processing efficiency for interrupt processes. SOLUTION: The processor is configured so that one external interrupt control part 201 for accepting interrupt requests to a plurality of processor units 202a-202d and causing either of the plurality of processor units 202a-202d to perform an interrupt is provided with: an overall interrupt priority control part 204 for determining the process priority of tasks being processed by the processor units 202a-202d; an interrupt process selecting part 205 for selecting from the processor units 202a-202d a processor part that is processing the task of the lowest process priority determined by the overall interrupt priority control part 204, if an interrupt request occurs as the processor units 202a-202d are processing the tasks, and for sending an interrupt request to the processor unit selected; and a control managing part 212. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006259968(A) 申请公布日期 2006.09.28
申请号 JP20050074469 申请日期 2005.03.16
申请人 SEIKO EPSON CORP 发明人 TAMURA AKIHIKO;TANAKA KATSUYA
分类号 G06F13/24;G06F9/50 主分类号 G06F13/24
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