发明名称 PROCESSOR DESIGN EQUIPMENT, PROCESSOR DESIGN METHOD, AND PROCESSOR DESIGN PROGRAM
摘要 PROBLEM TO BE SOLVED: To efficiently generate a processor model suiting execution of a particular application. SOLUTION: When an application program 1 is inputted into a compile means 2, and object code 3 operating on a logic synthesis possible base processor model 6 is generated, hardware resource information 5 necessary for operating the application program 1 is extracted by a hardware resource information extracting means 4, and by removing hardware resources unnecessary for execution of the application program 1 from the logic synthesis possible base processor model 6 by an unnecessary hardware resource removing means 7 on the basis of the hardware resource information 5, a logic synthesis possible target processor model 8 suiting execution of the application program 1 is generated. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006259805(A) 申请公布日期 2006.09.28
申请号 JP20050072438 申请日期 2005.03.15
申请人 SEIKO EPSON CORP 发明人 ISOMURA MASAICHI
分类号 G06F17/50 主分类号 G06F17/50
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