| 摘要 |
<p>There is provided an information processing device including a CPU for executing an OS and firmware, a plurality of memory controllers for controlling write-in and read-out to/from a plurality of memories and monitoring an error, and a plurality of memories connected to the respective memory controllers. The memory controller successively reads memory areas of the memories connected to the memory controller and monitors the error region. The firmware converts an address grasped by the memory controller corresponding to the error region, into a logical address for supply to the OS.</p> |
