| 摘要 |
A method of operating a P-channel memory is described. The P-channel memory includes a substrate, a gate formed over the substrate, a charge trapping structure disposed between the substrate and the gate, and the first and second sources/drains formed in the substrate adjacent to two sides of the charge trapping structure. An erasing operation is performed by applying a first voltage to the second source/drain, applying a second voltage to the first source/drain, applying a third voltage to the gate, and applying a forth voltage to the substrate. Hot holes are injected in the charge trapping structure to erase the P-channel memory by the tertiary hot hole mechanism. The absolute value of the voltage differential between the third and the forth voltages is equal to, or less than 6V, and the second voltage is smaller than the third voltage.
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