发明名称 Output buffer circuit
摘要 An output buffer with a pre-emphasis function to deliver a logic signal to a transmission line as a distributed constant circuit includes a first buffer to receive a first signal assigning a logical value to a logic signal to thereby drive the transmission line, a second buffer to receive a second signal having a predetermined logical relationship with the first signal to thereby drive the line in cooperation with the first buffer, and a unit to detect a change in the logical value of the logic signal. The second buffer is higher in output impedance than the first buffer on condition that attenuation of a signal through the line is reduced. If a de-emphasis state continues, a data generator creates a control signal such that the second buffer cooperates with the first buffer to drive the transmission line. The output buffer circuits therefore operate with low power consumption even if the de-emphasis state continues.
申请公布号 US2006214691(A1) 申请公布日期 2006.09.28
申请号 US20060390134 申请日期 2006.03.28
申请人 NEC CORPORATION 发明人 NEDACHI TAKAAKI
分类号 H03K19/094 主分类号 H03K19/094
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