发明名称 CACHE MEMORY CONTROL METHOD AND CACHE MEMORY CONTROL DEVICE
摘要 <p>It is possible to reduce power consumption accompanying a cache hit miss judgment. For this, when accessing a cache memory having means for setting whether cache refill to each of ways in the cache memory is enabled for each CPU or each sled, firstly, a first cache hit miss judgment (steps 2-1, 2-2) is performed only for the way for which refill is enabled. If the first cache hit miss judgment results in a cache hit, the access end occurs (step 2-6). If the judgment results in a cache miss, only a way for which refill is disabled is accessed (step 2-3) or a second hit mist judgment is performed by accessing all the ways (step 2-4).</p>
申请公布号 WO2006101113(A1) 申请公布日期 2006.09.28
申请号 WO2006JP305676 申请日期 2006.03.22
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;KANEKO, KEISUKE 发明人 KANEKO, KEISUKE
分类号 G06F12/08;G06F12/12 主分类号 G06F12/08
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