发明名称 TEST DEVICE, TEST METHOD, AND TEST CONTROL PROGRAM
摘要 <p>It is possible to reduce a failure ratio of a semiconductor test device by reducing the number of central processing units required for controlling a test. There is provided a test device including: a plurality of test modules for testing devices under test and a central processing unit for controlling the test operation of the test modules according to the specified operation mode. In this test device, when the specified operation mode is a parallel test mode for simultaneously performing the same test on a plurality of test modules in parallel, the central processing unit executes a predetermined one test process so as to control the test operation in the test modules. On the other hand, when the specified operation mode is an independent test mode for executing different tests on a plurality of test modules independently from one another, the central processing unit controls a plurality of test modules in parallel by executing a plurality of test processes while switching them for each of the test modules.</p>
申请公布号 WO2006100959(A1) 申请公布日期 2006.09.28
申请号 WO2006JP304967 申请日期 2006.03.14
申请人 ADVANTEST CORPORATION;KUMAKI, NORIO 发明人 KUMAKI, NORIO
分类号 G01R31/28 主分类号 G01R31/28
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