发明名称 METHOD FOR FORMING PATTERN, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, PHASE SHIFT MASK, AND METHOD FOR DESIGNING PHASE SHIFT MASK
摘要 <P>PROBLEM TO BE SOLVED: To improve a dimensional precisision as a whole semiconductor device by reducing the influences of a proximity effect due to optical interference, and reducing the influences of aberration of a projection lens such as including coma aberration. <P>SOLUTION: In the method for forming the pattern, a plurality of gate patterns 204 parallel to one another are formed on a resist 200 in a predetermined circuit block region 102 by exposure through a phase shift mask having apertures with two kinds of inverted phases. When the spacing between adjacent gate patterns 204 exceeds a preliminarily determined maximum allowable pitch, a virtual pattern 208 is laid between the adjacent gate patterns 204, the virtual pattern being parallel to the gate patterns 204 and at a distance smaller than the maximum allowable pitch; and phases in different types are alternately assigned between each gate pattern 204 and the virtual pattern 208 laid parallel to each other, in the arrangement direction of the patterns. <P>COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006259381(A) 申请公布日期 2006.09.28
申请号 JP20050078125 申请日期 2005.03.17
申请人 NEC ELECTRONICS CORP 发明人 FUJIMOTO TADASHI
分类号 G03F1/30;G03F1/36;G03F1/68;G03F7/20;H01L21/027 主分类号 G03F1/30
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