发明名称 METHOD FOR FORMING CONNECTION HOLE
摘要 PROBLEM TO BE SOLVED: To form a connection hole by which appropriate interlayer connection can be realized in an interlayer insulating film including a coating insulating film. SOLUTION: A wiring layer 14 having a reflection prevention film 14c such as TiN or the like is formed on an insulating film 12 covering one main surface of a semiconductor substrate 10, and then the wiring layer 14 is covered and an interlayer insulating film including insulating films 16a to 16c are formed. The insulating films 16a and 16c are made of a silicon oxide film that is formed by plasma CVD method, and the insulating film 16b is made of a coating insulating film such as an inorganic or organic SOG or the like. When a connection hole 20 corresponding to a part of the wiring layer 14 is formed in the interlayer insulating film by dry etching using a resist layer as a mask, etching is applied up to the insulating film 16b wherein sand etching tends to progress under a condition with high deposition containing no N<SB>2</SB>, and the insulating film 16a is etched thereafter under a condition with low deposition containing N<SB>2</SB>. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006261269(A) 申请公布日期 2006.09.28
申请号 JP20050074488 申请日期 2005.03.16
申请人 YAMAHA CORP 发明人 FUJIMOTO SHINJI
分类号 H01L21/768;H01L21/3065 主分类号 H01L21/768
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