发明名称 Level conversion circuit
摘要 An input circuit (a first transistor pair) that receives complementary input signals is connected to a latch circuit (a second transistor pair) that converts the amplitude of an input signal into second amplitude higher than first amplitude. A current mirror circuit (a third transistor pair) is disposed between the latch circuit and a high-level power supply line. The current mirror circuit makes a source voltage of the second transistors being turned on lower than the source voltage of the second transistors being turned off. The second transistors being turned on are likely to be turned off although the on-current of corresponding first transistors is low. To the contrary, the second transistors being turned off are likely to be turned on. Accordingly, even when a voltage of a high logic level of an input signal is low, the level conversion circuit can surely operate without malfunction.
申请公布号 US2006214685(A1) 申请公布日期 2006.09.28
申请号 US20050166255 申请日期 2005.06.27
申请人 FUJITSU LIMITED 发明人 NUNOKAWA HIDEO
分类号 H03K19/0175 主分类号 H03K19/0175
代理机构 代理人
主权项
地址