发明名称 OPERATING A PHASE LOCKED LOOP
摘要 <p>A PLL comprises a VCO and a loop filter, wherein the VCO generates an AC output signal having a frequency which depends on an applied control voltage, and wherein the loop filter provides a control voltage to the VCO. The control voltage reflects determined phase differences between a potentially frequency divided output signal of the VCO and a reference signal. When operating the PLL, frequency deviations between a potentially frequency divided output signal of the VCO and a reference signal are detected and in addition, a resolution employed for detecting the frequency deviations is lower than a resolution employed for determining the phase differences. In case a frequency deviation is detected, a direct-current voltage shift is added to the control voltage provided by the loop filter.</p>
申请公布号 WO2006100617(A1) 申请公布日期 2006.09.28
申请号 WO2006IB50737 申请日期 2006.03.09
申请人 NOKIA CORPORATION;SALONEN, VESA;VILHONEN, SAMI 发明人 SALONEN, VESA;VILHONEN, SAMI
分类号 H03L7/113;H03L7/187 主分类号 H03L7/113
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