发明名称 METHOD OF FORMING A BIT LINE IN FLASH MEMORY DEVICE
摘要 <p>A method for forming a bit line of a flash memory device is provided to reduce the sensing time and wire resistance by separately arranging a second metal layer of an upper metal wire and a first metal layer of a lower metal wire in zigzags to form a bit line. A first interlayer dielectric(12) is formed on a semiconductor substrate(10) where a semiconductor device. The first interlayer dielectric is patterned to form a drain contact hole. A first metal material is gap-filled in the drain contact hole at the same time formed on an upper portion of the first interlayer dielectric in a predetermined thickness. The first metal material formed on the upper portion of the first interlayer dielectric is patterned to form a first metal layer(A) arranged on every odd number of a lower metal wire(BL1) and a landing pad(B) between the first metal layers. A second interlayer dielectric(16) is formed on the whole surface where the metal layer and the landing pad are formed. The second interlayer dielectric is patterned to form a trench exposing the landing pad. A second metal material is gap-filled only in the trench. A second metal layer(D) is formed to be arranged on every even number of an upper metal wire(BL2). The second metal layer of the upper metal wire and the first metal layer of the lower metal wire are separately arranged in zigzags.</p>
申请公布号 KR100632656(B1) 申请公布日期 2006.09.28
申请号 KR20050043250 申请日期 2005.05.23
申请人 HYNIX SEMICONDUCTOR INC. 发明人 JUNG, WOO YUNG;KIM, TAE KYUNG;KIM, EUN SOO
分类号 H01L21/8247;H01L27/115 主分类号 H01L21/8247
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