| 摘要 |
A small semiconductor device which can be fabricated at the wafer level has high reliability of external terminals with respect to distortion caused by differential thermal expansion between a semiconductor element of the device and a printed circuit board and has superior electrical performance achieved through reduced static capacitance of interconnections. A thick stress-moderating layer with a low elastic modulus is interposed between the semiconductor element and interconnections and lands and improves the reliability of external terminals by absorbing distortion caused by the differential thermal expansion. The thick stress-moderating layer also reduces static capacitance between the interconnections and internal interconnections of the semiconductor element. Even around element electrodes, where the stress-moderating layer is not formed, static capacitance is reduced by an insulating film interposed between the interconnections and the semiconductor element. |
