FPGA with hardware decryptor for configuration programme which adds second key to itself before re-encrypting and overwriting itself in memory when run

摘要

A programmable logic device includes a programmable array (108) of volatile logic elements which when loaded with a configuration program is operable to perform a process, a hardware decryption processor (106) including a register (110) having stored therein a first secret configuration key, and a non-volatile store (102) is arranged to store a configuration program which has been encrypted with the first secret configuration key. The configuration program including therein the first secret configuration key. The hardware decryption processor is operable, when power is applied to read and decrypt the encrypted configuration program using the first secret configuration key and to configure the programmable array with the program. The programmable logic array when configured is operable to read from the non-volatile store and decrypt the configuration program using the first secret configuration key provided with the program, to generate a second secret key and to adapt the configuration program by inserting the second secret key, to re-encrypt the adapted configuration program using the first secret configuration key, and to replace the configuration program with the adapted configuration program in the memory. The logic array may be an FPGA and the system may be used in video set top boxes.