发明名称 LOGICAL CALCULATION UNIT
摘要 FIELD: computation engineering. ^ SUBSTANCE: device has n-1 logical units, each having two AND-gates, OR-gate and two D-triggers. The first output of each logical unit is connected to its third input whereas the second input of each previous logical unit being connected to the fifth input of the following logical unit. Specific is that the fifth input of the first logical unit and the second (n-1)-th logical unit output are connected to information input and output of the logical calculation unit, respectively. The first and the second control inputs of the unit are formed by united first and united second inputs of the first-(n-1)-th logical units. ^ EFFECT: reduced hardware losses with functional prototype capabilities being retained. ^ 2 dwg
申请公布号 RU2284567(C1) 申请公布日期 2006.09.27
申请号 RU20050112123 申请日期 2005.04.22
申请人 GOSUDARSTVENNOE OBRAZOVATEL'NOE UCHREZHDENIE VYSSHEGO PROFESSIONAL'NOGO OBRAZOVANIJA "UL'JANOVSKIJ GOSUDARSTVENNYJ TEKHNICHESKIJ UNIVERSITET" 发明人 ANDREEV DMITRIJ VASIL'EVICH
分类号 G06F7/00 主分类号 G06F7/00
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