发明名称 Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
摘要 An electronic assembly is assembled by stacking two or more integrated circuit dies on top of one another. Prior to singulation, an opening is laser-drilled into an upper die, and subsequently filled with a conductive member. The conductive member is located on a lower die and interconnects integrated circuits of the upper and lower dies. Laser-drilling allows for faster throughput when compared to, for example, etching, especially if a small number of openings has to be formed. The opening is laser-drilled from an upper surface of the upper die all the way through the die, which allows for the use of alignment marks on an upper surface of the upper die.
申请公布号 US7112887(B2) 申请公布日期 2006.09.26
申请号 US20040996163 申请日期 2004.11.23
申请人 INTEL CORPORATION 发明人 SWAN JOHANNA M.;NATARAJAN BALA;CHIANG CHIEN;ATWOOD GREG;RAO VALLURI R.
分类号 H01L23/48;H01L21/768;H01L25/065 主分类号 H01L23/48
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