发明名称 |
Latch circuit and synchronous memory including the same |
摘要 |
A latch system has two latch circuits corresponding to two internal clock signals synchronized with an external output signal. The internal clock signals are synchronized with rising edges of the external clock signal and produced as one-shot pulses having a frequency corresponding to ½ of an external clock frequency of the external clock signal.
|
申请公布号 |
US7113446(B2) |
申请公布日期 |
2006.09.26 |
申请号 |
US20040995528 |
申请日期 |
2004.11.24 |
申请人 |
ELPIDA MEMORY INC. |
发明人 |
FUJISAWA HIROKI |
分类号 |
G11C8/00;G11C11/407;G11C7/00;G11C7/10;G11C7/22;G11C8/06;G11C11/4063;G11C11/4076;G11C11/4096 |
主分类号 |
G11C8/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|