发明名称 Method of selectively etching HSG layer in deep trench capacitor fabrication
摘要 The invention provides a method of selectively etching a Hemispherical Silicon Grain (HSG) layer during deep trench capacitor fabrication. A substrate having a pad structure and a deep trench is provided. A buried oxide layer is formed on the upper sidewall of the deep trench and a HSG layer and an ASG layer are formed in the deep trench sequentially. A mask layer is filled into the deep trench and recessed; the exposed ASG layer is then removed. The HSG layer is doped to form a plasma doping layer on the upper portion of the deep trench, which is removed without damaging the silicon substrate. After the mask layer is removed, a cap oxide layer is formed on the deep trench, and the substrate is subjected to a thermal treatment to form a buried plate.
申请公布号 US7112505(B2) 申请公布日期 2006.09.26
申请号 US20040793928 申请日期 2004.03.08
申请人 PROMOS TECHNOLOGIES, INC. 发明人 WU YUNG-HSIEN
分类号 H01L21/76;H01L21/02;H01L21/205;H01L21/265;H01L21/311;H01L21/3213;H01L21/334 主分类号 H01L21/76
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