| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a memory control device and a memory control method that can reduce a peak current by smoothing currents supplied to all dynamic RAMs when a plurality of the dynamic RAMs requiring refresh operations are connected. <P>SOLUTION: A system LSI 103 is mounted with the memory control device 104. The memory control device 104 staggers the timing of issuing refresh commands to SDRAMs 101 and 102 to enable read access, write access and powering down (power saving control) to the SDRAM not being refreshed. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
