发明名称 Circuits and methods for interconnecting bus systems
摘要 Circuits and methods for interconnecting a live backplane and at least one I/O card are provided. This invention provides interconnection circuitry that utilizes buffer circuitry to connect the data and clock busses of the backplane to the data and clock busses of the I/O card in a "hot-swappable" fashion. Buffer circuitry also isolates the capacitance associated with the backplane from the capacitance associated with the I/O card. For example, when at least one signal is driven from the backplane to the I/O card, the signal need only overcome the capacitance associate with the backplane. Conversely, when at least one signal is driven from the I/O card to the backplane, the signal need only overcome the capacitance associated with the I/O card. Hence, this capacitive isolation facilitates signal propagation between the backplane and the I/O card.
申请公布号 US2006212634(A1) 申请公布日期 2006.09.21
申请号 US20060364832 申请日期 2006.02.27
申请人 LINEAR TECHNOLOGY CORP. 发明人 REAY ROBERT L.;ZIEGLER JOHN H.
分类号 G06F13/00;G06F13/40 主分类号 G06F13/00
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