发明名称 Enhanced STCX design to improve subsequent load efficiency
摘要 A method, system and computer program product for processing in a multiprocessor data processing system are disclosed. The method includes, in response to executing a load-and-reserve instruction in a processor core, the processing core sending a load-and-reserve operation for an address to a lower level cache of a memory hierarchy, invalidating data for the address in a store-through upper level cache, and placing data returned from the lower level cache into the store-through upper level cache.
申请公布号 US2006212653(A1) 申请公布日期 2006.09.21
申请号 US20050082761 申请日期 2005.03.17
申请人 ALEXANDER GREGORY W;AREVALO JUAN J;SINHAROY BALARAM;TUNG SHIH-HSIUNG S 发明人 ALEXANDER GREGORY W.;AREVALO JUAN J.;SINHAROY BALARAM;TUNG SHIH-HSIUNG S.
分类号 G06F12/00 主分类号 G06F12/00
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