| 摘要 |
In order to reduce the parasitic capacitance of the device and obtain an enhanced high-speed response characteristic while assuring the reliability of the device, a semiconductor device is provided such that it comprises: a mesa structure formed on a semiconductor substrate and including a first cladding layer, an active layer, a second cladding layer, a first protective layer and a second protective layer each covering respective side of the active layer, and a cap layer formed between the first protective layer and the second protective layer and covering the top surface of the active layer, wherein aluminum is included only in the active layer; and a buried layer for burying the mesa structure, wherein the first cladding layer, the first protective layer, the second protective layer, and the second cladding layer constitute the side of the mesa structure.
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