发明名称 SYSTEM AND METHOD FOR A MEMORY WITH COMBINED LINE AND WORD ACCESS
摘要 A system and method for a processor with memory with combined line and word access are presented. A system performs narrow read/write memory accesses and wide read/write memory accesses to the same memory bank using multiplexers and latches to direct data. The system processes 16 byte load/sore requests using a narrow read/write memory access and also processes 128 byte DMA and instruction fetch requests using a wide read/write memory access. During DMA requests, the system writes/reads sixteen DMA operations to memory on one instruction cycle. By doing this, the memory is available to process load/store or instruction fetch requests during fifteen other instruction cycles.
申请公布号 WO2006082154(A3) 申请公布日期 2006.09.21
申请号 WO2006EP50433 申请日期 2006.01.25
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION;IBM UNITED KINGDOM LIMITED;DHONG, SANG HOO;FLACHS, BRIAN KING;HOFSTEE, HARM PETER;TAKAHASHI, OSAMU 发明人 DHONG, SANG HOO;FLACHS, BRIAN KING;HOFSTEE, HARM PETER;TAKAHASHI, OSAMU
分类号 G06F13/16 主分类号 G06F13/16
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