发明名称 |
SELECTIVELY PERFORMING FETCHES FOR STORE OPERATIONS DURING SPECULATIVE EXECUTION |
摘要 |
One embodiment of the present invention provides a processor which selectively fetches cache lines for store instructions during speculative-execution. During normal execution, the processor issues instructions for execution in program order. Upon encountering an instruction which generates a launch condition, the processor performs a checkpoint and begins the execution of instructions in a speculative-execution mode. Upon encountering a store instruction during the speculative-execution mode, the processor checks an L1 data cache for a matching cache line and checks a store buffer for a store to a matching cache line. If a matching cache line is already present in the L1 data cache or if the store to a matching cache line is already present in the store buffer, the processor suppresses generation of the fetch for the cache line. Otherwise, the processor generates a fetch for the cache line. |
申请公布号 |
WO2006007075(A3) |
申请公布日期 |
2006.09.21 |
申请号 |
WO2005US16434 |
申请日期 |
2005.05.11 |
申请人 |
SUN MICROSYSTEMS, INC.;CHAUDHRY, SHAILENDER;TREMBLAY, MARC;CAPRIOLI, PAUL |
发明人 |
CHAUDHRY, SHAILENDER;TREMBLAY, MARC;CAPRIOLI, PAUL |
分类号 |
G06F9/38 |
主分类号 |
G06F9/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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