发明名称 |
Method and system for calibrating input voltage of voltage controlled oscillator and digital interface used for calibrating input voltage |
摘要 |
A method and a system for calibrating an input voltage of a voltage controlled oscillator and a digital interface used for calibrating the input voltage. The method includes: setting a lock detection time for tuning a signal phase; setting a lock detection voltage section; setting output frequency values at predetermine spacings; checking connection states of capacitors of the capacitor bank necessary for a lock of the output frequency values; storing information regarding the connection states of the capacitors in the output frequency values; and if one of the output frequency values is determined depending on a change of a channel, setting connection states of the capacitors according to the information regarding the connection state corresponding to the one frequency value. The capacitor bank includes: a predetermined number of capacitors having different capacitances and connected to one another in parallel; and switches connected to the capacitors in series.
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申请公布号 |
US2006208808(A1) |
申请公布日期 |
2006.09.21 |
申请号 |
US20060368627 |
申请日期 |
2006.03.07 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
BANG HEE-MUN;KIM DAE-KI;KIM CHONG-OUK;LEE HEUNG-BAE;JUNG SUNG-JAE;JEON SANG-YOON |
分类号 |
H03L7/00 |
主分类号 |
H03L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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