| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a display controller capable of reducing data transfer cycles on a common data path without performing unintended image display. <P>SOLUTION: The display controller of the invention for performing output processing of an image data to a display section of a computer based on a timing pulse comprises; a VRAM (video random access memory) reading controller 27 for acquiring an image data which is newly stored in a VRAM 12 of the computer; a frame cache 21 for storing the acquired image data; a selector 15 for selecting either outputting the acquired image data to the display section as it is, or outputting the image data stored in the frame cache 21 to the display section; and a flag signal generating means for determining whether the acquired image data is used or a new image data is used as the image data for outputting to the display section, when the new image data is newly stored in the VRAM 12. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
