| 摘要 |
A semiconductor memory device including: a memory cell array with electrically rewritable and non-volatile memory cells arranged therein; a sense amplifier circuit configured to read data of the memory cell array; first data hold circuits configured to hold data for designating whether each column of the memory cell array is defective or not; and a second data hold circuit configured to hold data read out of the first dada hold circuits, and control to skip a defective column address of the memory cell array in accordance with the data read out of the first data hold circuit.
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