发明名称 Circuits and methods for testing programmable logic devices using lookup tables and carry chains
摘要 Circuit implementations and test methods enable the testing of lookup table (LUT) input paths, "stuck at" memory cell values, and carry chains. One method includes storing a first bit pattern in each LUT, configuring the carry chain to perform a wide AND function of the LUT outputs, and cycling the inputs of each LUT while comparing the carry chain output to an expected value and reporting the PLD faulty if a difference is detected. The carry chain is configured to perform a wide OR function, and the cycling step is repeated. The bit pattern within each LUT is changed to the complement of the first bit pattern by providing a series of shift commands or by otherwise storing new values in the LUT, and the configuring and cycling steps are repeated. The invention also provides PLD circuit implementations that can be used to perform the described methods.
申请公布号 US7111214(B1) 申请公布日期 2006.09.19
申请号 US20020268877 申请日期 2002.10.09
申请人 XILINX, INC. 发明人 CHAUDHARY KAMAL;KRISHNAMURTHY SRIDHAR
分类号 G01R31/28;G06F7/38;G06F11/00;H01L25/00 主分类号 G01R31/28
代理机构 代理人
主权项
地址