发明名称 Electronic circuit design analysis system
摘要 A method, apparatus and program product generate package files that are separately stored and selectively combined to generate a net file suited for system simulation and analysis. Selective combination of the package files using respective reference connections of each package enables focused and efficient modeling of design performance characteristics.
申请公布号 US7111275(B2) 申请公布日期 2006.09.19
申请号 US20030651151 申请日期 2003.08.28
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHEN THADDEUS;CHEN ZHAOQING;HARRER HUBERT;HOFFMAN JAN ELIZABETH;KARWOSKI SUSAN MARIE;PARK JOONSUK;WHITE STEPHEN BRUCE;ZACK JOHN W.
分类号 G06F17/50 主分类号 G06F17/50
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