equivalent circuit modeling method for clock skew analysis of multi-driven clock grid network,申请号KR20000053831-传众专利搜索

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发明名称	equivalent circuit modeling method for clock skew analysis of multi-driven clock grid network
摘要
申请公布号	KR100625192(B1)	申请公布日期	2006.09.18
申请号	KR20000053831	申请日期	2000.09.09
申请人		发明人
分类号	G06F1/00	主分类号	G06F1/00
代理机构		代理人
主权项
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