| 摘要 |
The present invention relates to a method of fabricating a flash memory device. The width of an active region (line) is reduced, but the width of a field region (space) is extended. An overlay margin between the floating gates and the active region depending upon increase in the level of integration of a device can be improved. A channel is formed not only an active region but also sidewalls of trenches at both sides of the active region, thus extending an effective channel length. It is thus possible to compensate for a reduction in the cell current depending upon a reduction of the width of the active region (line).
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