| 摘要 |
PROBLEM TO BE SOLVED: To provide a cache memory capable of keeping the coherency of data between processors with the excellent efficiency of operation, and to provide a processor provided with the cache memory. SOLUTION: This cache memory is provided with a data memory 207 for storing data cached by a plurality of processors, a tag memory 206 for managing the address of data in the data memory 207 in a lump, a hit detection part 208 for checking the address of data whose supply is demanded by the processor with the address managed by the tag memory 206 to detect whether the data whose supply is demanded can be read from the data memory 207 or not, and a cache control part 103 for supplying the detected data to the processor when it is detected by the hit detection part 208 that the data can be read. COPYRIGHT: (C)2006,JPO&NCIPI
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