| 摘要 |
A processor, e.g., a VLIW processor, may include two separate execution units, a first execution unit may have a general-purpose register file and an arithmetic logic unit. The register file may source operands to the ALU, and the result of the ALU operation may be stored in the register file or an accumulator. A second execution unit may include instruction control logic that executes an instruction which causes data to be moved through a data path within the first execution unit, e.g., from the ALU or accumulator to the register file, or to and/or from the execution unit. Thus, for example, the first execution unit performs a multiplication operation while the second execution unit moves the results of a multiplication operation (e.g., the most recent multiplication operation) to the register file. This avoids the operation-performing execution unit from expending instruction cycles on data movement operations, which reduces the number of software instruction cycles required to implement the overall logical function, thereby increasing processor performance.
|
