| 摘要 |
A display panel for a liquid crystal display comprising a timing controller and a plurality of source drivers is provided. The timing controller receives a differential signal (LVDS/TMDS/DVI) to generate a plurality of TTL signals and a sync signal. Each of the source drivers comprises at least one bus directly connected to the timing controller to receive corresponding TTL signal. The timing controller comprises a clock line, coupled to the source drivers for transmission of the sync signal. Each TTL signal comprises a corresponding image information. The TTL signals, sequentially transmitted by the bus, conform to the transistor-to-transistor logic (TTL) standard.
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