发明名称 Arrangement with a low inductance for circuit
摘要 The circuit has an insulating substrate with isolated metal tracks, 2 series power switches with groups of power transistors in parallel, d.c. and a.c. tracks. The power transistors are close together in a row, the d.c. tracks close together in a strip in one section and parallel to near the surface or in contact with it. At least one d.c. track has a second strip section parallel to the surface with bridges and a surface contact point(s). The circuit consists of an electrically insulating substrate (9) carrying mutually isolated metal connecting tracks, two series power switches, each with first and second groups of power transistors (13,19) in parallel and d.c. (21) and a.c. (22) connecting conductors. The power transistors are arranged close together and in a row, the d.c. conductors are arranged close together in a strip in a first section and parallel as far close to the substrate surface or are in contact with it. At least one d.c. conductor has a second strip section parallel to the substrate surface with bridges (23) partly separated from the substrate by an insulating layer and at least one contact point (12) with the substrate surface.
申请公布号 EP1178595(B1) 申请公布日期 2006.09.13
申请号 EP20010115975 申请日期 2001.06.30
申请人 SEMIKRON ELEKTRONIK GMBH & CO. KG 发明人 MOURICK, PAUL, DR.
分类号 H01L29/78;H02M7/00;H01L25/07;H01L27/04;H05K9/00 主分类号 H01L29/78
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