发明名称 Electronic apparatus system with master node and slave node
摘要 <p>An electronic apparatus system is disclosed that comprises at least one master node (MS7); and a plurality of slave nodes (SL1,SL2...SLn) connected to the at least one master node via an I 2 C interface, wherein each of the plurality of slave nodes is set to a slave address with an address distance of two bits or greater with respect to one another. Thus, wrong addressing due to single-bit errors is avoided.</p>
申请公布号 EP1701271(A1) 申请公布日期 2006.09.13
申请号 EP20050254737 申请日期 2005.07.28
申请人 FUJITSU LIMITED 发明人 HATAMORI, SHUEI
分类号 G06F11/10;G06F13/40 主分类号 G06F11/10
代理机构 代理人
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