发明名称 |
MEMORY SYSTEM SEGEMENTED POWER SUPPLY AND CONTROL |
摘要 |
A memory device having memory cells supplied with a separate higher voltage power than the separate power supplied to memory logic, and a lower power state that entails removing power from at least some of the logic such that refresh operations to preserve the contents of the memory cells continue to take place, but at least some of the interface to the memory device is powered down to reduce power consumption. |
申请公布号 |
EP1700311(A1) |
申请公布日期 |
2006.09.13 |
申请号 |
EP20040815557 |
申请日期 |
2004.12.22 |
申请人 |
INTEL CORPORATION |
发明人 |
ELLIS, ROBERT, M.;MOONEY, STEPHEN, R.;KENNEDY, JOSEPH, T. |
分类号 |
G11C11/406;G11C5/14;G11C11/4074 |
主分类号 |
G11C11/406 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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