发明名称 Method and apparatus to analyze noise in a pulse logic digital circuit design
摘要 A method and apparatus to analyze noise in a pulse logic digital circuit comprising identifying a channel connected component (CCC) in the pulse logic digital circuit design, said CCC comprising a pulse generator. Modifying the pulse logic digital circuit by disconnecting the pulse generator form an input of the CCC in the pulse logic digital circuit design. Turning on the pulse logic digital circuit, inputting a noise signal to the CCC and monitoring an output of the pulse logic digital circuit during the time the pulse logic digital circuit is turn on.
申请公布号 US7107552(B2) 申请公布日期 2006.09.12
申请号 US20030458458 申请日期 2003.06.10
申请人 INTEL CORPORATION 发明人 SINGH PUNEET
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址